xxlio 11fb30268f docs(design): design set, with its origin and the method that made it ...

The five design documents plus the implementation brief, brought across
as issued. Adds two things the old repo never recorded:

  00-origin/  the one-page idea the whole document set was generated from
  README.md   how the set was produced - idea -> basic design -> detailed
              design -> implementation brief - so the team can repeat the
              method for their own demos, including what to do differently

CTL-003 gains a dated amendment block. Its section 2 register map was
verified line by line against register-map.csv and is correct; its
sections 1 and 9 specify a MatIEC flat-file build that does not exist on
Runtime v4, and forbid the PLCopen route actually used. Nine corrections
listed, body unchanged.

Not brought across: superseded/WRPS-CTL-002_OpenPLC_Build_Brief.md - dead,
and its number collides with the live FDS.

2026-09-02 15:25:54 +10:00

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